MIXDES - The MIXDES 2003 information

10th International Conference
Mixed Design of Integrated Circuits and Systems
Łódź, 26-28 June 2003

The MIXDES 2003 Conference took place in Łódź, Poland. The topics of the MIXDES Conference included:

  1. Design of Integrated Circuits and Microsystems
  2. Thermal Issues in Microelectronics
  3. Analysis and Modelling of ICs and Microsystems
  4. Microelectronics Technology and Packaging
  5. Testing and Reliability
  6. Power Electronics
  7. Signal Processing
  8. Embedded Systems
  9. Medical Applications
  10. Education

The total number of 130 papers from 28 countries were accepted for publication including 5 invited papers.

The following invited papers were presented during the conference:

  1. Gigabit per Second Mixed-signal Integrated Circuits for Storage Area Networking, K. Iniewski (Simon Fraser Univ., CANADA), B. Hagglund (Argon Securities Technologies, CANADA), M. Syrzycki (Simon Fraser Univ., CANADA)
  2. Modernizing the Framework for Deep Submicron Design - For CMOS and Beyond, D. Foty (Gilgamesh Associates, USA)
  3. Semiconductor Technology Outlook: 90nm/300mm and Beyond, A. Wild (MOTOROLA Crolles, FRANCE)
  4. Si Surface Orientation Dependence of Performance and Reliability in Ultra-thin Gate Oxide CMOS, H.S. Momose (TOSHIBA Corp., JAPAN)
  5. System & Technology Outlook to Address the Next Generation of Electronic Architectures, C. Cordonnier (MOTOROLA Geneva, SWITZERLAND)

The following special sessions were organised during the conference:

  1. Special Session I: Optoelectronics and Photonics
    • Advanced Analysis of Vertical-cavity Lasers, J. Piprek (Univ. California, USA)
    • Advanced Computational Tools for Multiphysics Analysis and Design of Semiconductor Lasers, Z. Sikorski, M. Turowski, Y. Jiang, T. Czyszanowski, A.J. Przekwas (CFDRC, USA)
    • Mutual Interactions between Physical Phenomena Crucial for an Operation of Possible Nitride VCSELs, W. Nakwaski (Tech. Univ. Lodz, Poland and Univ. New Mexico, USA)
    • Optoelectronic Multi-chip Modules, D.M. Chiarulli, S.P. Levitan, J.D. Bakos (Univ. Pittsburgh, USA)
    • The MOEMS Architectures for Micro- and Nano-sensors, C. Gorecki (Univ. de Franche-Comte, FRANCE)
  2. Special Session II: Compact Modelling and Its Standarization
    • An Accurate Prediction of High-frequency Circuits, S. Yoshitomi, H. Kimijima (TOSHIBA Corp., JAPAN)
    • An Analytical Quantum Model for the Surface Potential of Deep-submicron MOSFETs, F. Pregaldiny, C. Lallement (ERM-PHASE, FRANCE), W. Grabinski (MOTOROLA Geneva, SWITZERLAND), J.-B. Kammerer (LEPSI, FRANCE), D. Mathiot (ERM-PHASE, FRANCE)
    • A Phase-noise Analysis for Monolithic LC-VCOs, S. Magierowski, S. Zukotynski (Univ. Toronto, CANADA), K. Iniewski (SilicoMOS Inc., CANADA)
    • Bipolar Modeling and Selfheating: An Equivalent Network Representation for the Thermal Spreading Impedance in SiGe HBTs, H. Mnif, T. Zimmer (Univ. Bordeaux 1, FRANCE), J.L. Bttaglia (LEPT-ENSAM, FRANCE), S. Fregonese (Univ. Bordeaux 1, FRANCE)
    • DC Motor Compact Model, A. Lara (MOTOROLA Roznov, CZECH REPUBLIC), L. Lemaitre (MOTOROLA Geneva, SWITZERLAND)
    • MOSFET 1/f Noise Modeling, J.A. Chroboczek, P. Martin (CEA-LETI, FRANCE)
    • MOSFET Modeling for Low Temperature (77 K - 200 K) Analog Circuit Design, P. Martin (CEA-LETI, FRANCE), M. Bucher (Nat. Tech. Univ. Athens, GREECE)
    • Silicon-on-Insulator MOSFET Modeling and Its Verilog-A Coding, D. Tomaszewski (Institute of Electron Techn., POLAND), W. Grabinski, L. Lemaitre (MOTOROLA Geneva, SWITZERLAND), A. Jakubowski (Warsaw Univ. of Techn., POLAND)
  3. Vendor Presentations
    • Co-design of MEMS and Electronics, G. Schropfer (Coventor Sarl, FRANCE), J. van Kuijk (Coventor BV, THE NETHERLANDS), G. Lorenz (Coventor Sarl, FRANCE), F.-X. Musalem, C. Welham (Coventor BV, THE NETHERLANDS), M. Dasilva (Coventor Inc., USA)

The following papers has been awarded:

  • Outstanding Paper Award was presented to:
    • A/D Prototype System for EEG Signal Acquisition in Brain-Computer Interfaces, A. Materka, M. Byczuk (Tech. Univ. Lodz, POLAND)
    • Advanced Microelectronics Education for the Information and Communication Technology, T. Ostermann (Univ. Linz, AUSTRIA), L. Krahn (Fraunhofer Inst. IZM, GERMANY), C. Lackner, R. Kossl, R. Hagelauer (Univ. Linz, AUSTRIA), N. Scholz, M. Grote, H.-T. Mammen, W. John (Fraunhofer Inst. IZM, GERMANY), P. Schwarz, R. Jancke, U. Knochel, A. Sauer, G. Elst (Fraunhofer Inst. IIS, GERMANY)
    • A High-linear Wide-tunable CMOS Transconductor for Video Frequency Applications, B. Calvo, S. Celma, M.T. Sanz, P.A. Martinez (Univ. Zaragoza, SPAIN)
    • An XVIII Century Switching Boost Converter. The Hydraulic Ram, F. Masana (Tech. Univ. Catalunya, SPAIN)
    • A Power Constrained Design Strategy for CMOS Tuned Low Noise Amplifiers, O. Mitrea, M. Glesner (Darmstadt Univ. of Techn., GERMANY)
    • Bipolar Mechanisms Present in Short Channel SOI-MOSFET Transistors, G. Janczyk (Warsaw Univ. of Techn., POLAND)
    • Bipolar Modeling and Selfheating: An Equivalent Network Representation for the Thermal Spreading Impedance in SiGe HBTs, H. Mnif, T. Zimmer (Univ. Bordeaux 1, FRANCE), J.L. Bttaglia (LEPT-ENSAM, FRANCE), S. Fregonese (Univ. Bordeaux 1, FRANCE)
    • Digitally Programmable CMOS Transconductor for Very High Frequency, A. Otin, S. Celma, C. Aldea (Univ. Zaragoza, SPAIN)
    • Downconversion Sampling Mixer for Wideband Low-IF Receiver, D. Jakonis, K. Folkesson, J. Dabrowski, C. Svensson (Linkoping Univ., SWEDEN)
    • Energy Collected by MOSFET Capacitance and Its Temperature Dependence, A. Golda, A. Kos (Univ. of Mining and Metallurgy, POLAND)
    • Process Characterisation for Low Power Design, E. Seebacher, G. Rappitsch, H. Holler (austriamicrosystems AG, AUSTRIA)
    • Simulation of Embedded Systems Containing Programmable Logic, K. Szmich (Tech. Univ. Lodz, POLAND), J. Luukko, O. Pyrhonen (Lappeenranta Univ. of Techn., FINLAND), A. Napieralski (Tech. Univ. Lodz, POLAND)
    • Study of Front-side Connected Chemical Field Effect Transistors for Water Analysis, P. Temple-Boyer, J. Launay, I. Humenyuk, T. Do Conto, A. Martinez (LAAS-CNRS, FRANCE), C. Beriet, A. Grisel (MICROSENS S.A., SWITZERLAND)
    • Synthesis Method for State Variable Gm-C Filters with a Reduced Number of Active Components, D. Csipkes, G. Csipkes, H.J. Jentschel (Tech. Univ. Dresden, GERMANY)
    • Technology Development for Silicon Monolithic Pixel Sensor in SOI Technology, H. Niemiec, T. Klatka, M. Koziel, W. Kucewicz, S. Kuta, W. Machowski, M. Sapor, M. Szelezniak (Univ. of Mining and Metallurgy, POLAND), K. Domanski, P. Grabiec, M. Grodner, B. Jaroszewicz, A. Kociubinski, K. Kucharski, J. Marczewski, D. Tomaszewski (Institute of Electron Techn., POLAND)
    • Toward a Methodology for Dynamically Reconfigurable FPGA Use, J. Cabestany, J.M. Moreno (Tech. Univ. Catalunya, SPAIN), J. Kadlec (Inst. of Information Theory and Automation, CZECH REPUBLIC), J. Scandaliaris (Tech. Univ. Catalunya, SPAIN), M. Licko (Inst. of Information Theory and Automation, CZECH REPUBLIC)
    • Web-based Applet for Teaching Boundary Scan Standard IEEE 1149.1, A. Jutman, A. Sudnitson, R. Ubar (Tallinn Univ. of Techn., ESTONIA)

 

Receipt of papers:

March 1st, 2017

Notification of acceptance:

April 30th, 2017

Registration opening:

May 15th, 2017

Final paper versions:

May 31th, 2017