MIXDES - The MIXDES 2014 information

21st International Conference Mixed Design of Integrated Circuits and Systems
June 19-21, 2014, Lublin, Poland

The MIXDES 2014 Conference took place in Lublin. The topics of the MIXDES Conference included:

  1. Design of Integrated Circuits and Microsystems
  2. Thermal Issues in Microelectronics
  3. Analysis and Modelling of ICs and Microsystems
  4. Microelectronics Technology and Packaging
  5. Testing and Reliability
  6. Power Electronics
  7. Signal Processing
  8. Embedded Systems
  9. Medical Applications
  10. Student Projects

The total number of 105 papers from 18 countries were presented including 5 invited papers.

The following invited papers were presented during the conference:

  1. 60 Years of Polish Transistors
    Jerzy Pułtorak (Institute of Electron Technology, POLAND)
  2. A Brief Overview of the Challenges of the Multicore Roadmap
    Jacques Collet (LAAS - CNRS, FRANCE)
  3. Magnetic Tunnel Junctions for Future Memory and Logic-in-Memory Applications
    Viktor Sverdlov (Technische Universitaet Wien, AUSTRIA)
  4. Optofluidic Photonic Liquid Crystal Fibers
    Tomasz R. Wolinski (Warsaw University of Technology, POLAND)
  5. Ultra Fast X-ray Detection Systems in Nanometer and 3D Technologies
    Paweł Gryboś (AGH University of Science and Technology, POLAND)

The following special sessions were organised during the conference:

  1. Compact Modeling Support for Heterogeneous Systems
    organised by Dr. Daniel Tomaszewski (Inst. of Electron Techn., Poland) and Dr. Władysław Grabiński (GMC Suisse, Switzerland)
    • A Fully Explicit Static Model for DG JLFET Valid in All Modes of Operation
      A. Yesayan (NAS Armenia, Armenia), F. Prégaldiny (ICube / Télécom Physique Strasbourg, France)
    • Improved Analytical Potential Modeling in Double-Gate Tunnel-FETs
      M. Gräf, T. Holtij, F. Hain, A. Kloes (Tech. Hochschule Mittelhessen, Germany), B. Iniguez (Univ. Rovira i Virgili, Spain)
    • Compact Modeling of Homojunction Tunnel FETs
      A. Biswas, N. Dagtekin, L. De Michielis, A. Bazigos, W. Grabiński, A. Ionescu (EPFL NanoLab, Switzerland)
    • Compact Modeling of Memristive IMP Gates for Reliable Stateful Logic Design
      H. Mahmoudi, T. Windbacher, V. Sverdlov, S. Selberherr (Tech. Univ. Wien, Austria)
    • Using an Integrated Inductor Model in Qucs
      M.H. Fino (Univ. Nova de Lisboa, Portugal)
    • Standardizing the Compact Model Developments for Emerging Transistors
      L. Zhang, M. Cheralathan, A. Zhang, R. Salahuddin, M. Chan (The Hong Kong Univ. of Science and Techn., Hong Kong)
    • A Simple Multi-Purpose Method for Compact Model Evaluation
      D. Tomaszewski, G. Głuszko, M. Zaborowski, J. Malesińska, K. Kucharski (Institute of Electron Techn., Poland)
  2. Modeling and Simulation of MEMS for Educational Purposes
    organised by Dr. Michał Szermer (Lodz University of Technology, Poland)
    • Measurement Set-up for Lab-on-a-chip Fluorimetric Detection
      I. Augustyniak, W. Kubicki, J. Dziuban (Wroclaw Univ. of Techn., Poland), D. Lizanetz, O. Matviykiv, M. Lobur (Lviv Polytechnic National Univ., Ukraine)
    • Microsystem Design Flow for SMEs
      K. Hahn, I. Gradek (Univ. Siegen, Germany), H. Kremer (micro-parts GmbH&Co. KG, Germany)
    • Monte Carlo Modeling of Stiffness of MEMS Membrane
      P. Kosobutskyy, M. Komarnutskyy (Lviv National Polytechnic Univ., Ukraine), C. Maj, P. Zając, M. Szermer, W. Zabierowski (Lodz Univ. of Techn., Poland)
    • Multiscale Flow Model for Simulation of Biofluidic Mixtures in Lab-Chip Devices
      O. Matviykiv, M. Lobur (Lviv Polytechnic National Univ., Ukraine), A. Napieralski, M. Szermer, W. Zabierowski (Lodz Univ. of Techn., Poland), I. Augustyniak (Wroclaw Univ. of Techn., Poland)
    • The Influence of Residual Stress Induced by Wafer Bonding on MEMS Membrane Properties
      C. Maj, P. Zając, M. Szermer, A. Napieralski (Lodz Univ. of Techn., Poland)
    • Threshold Sensor for High-doses of Radiation
      I. Augustyniak, P. Kanpkiewicz, J. Dziuban (Wroclaw Univ. of Techn., Poland), M. Olszacki (National Centre for Nuclear Research, Poland), A. Tchkalov (National Tech. Univ. Ukraine “Kiev Polytechnic Institute”, Ukraine), P. Pons (National Centre for Scientific Research, France)

The following papers has been awarded:

  1. Outstanding Paper Award:
    • 3D Face Geometry Analysis for Biometric Identification
      J. Napieralski, M. Pastuszka, W. Sankowski (Lodz Univ. of Techn., Poland)
    • A Hybrid Current-Mode Passive Second-Order Continuous-Time Sigma-Delta Modulator
      P. Śniatała, M. Naumowicz (Poznan Univ. of Techn., Poland), J.L.A. de Melo, N. Paulino, J. Goes (Univ. Nova de Lisboa, Portugal)
    • Architecture and Modeling of a Novel Optical Beamforming Network Suitable for Microwave Photonics Implementation
      G. Locatelli (Linkra Srl, Italy), P. Monsurrò, P. Tommasino, A. Trifiletti (Sapienza Univ. of Rome, Italy), A. Vannucci (Linkra Srl, Italy)
    • CCO-Based Continuous-Time ΔΣ Modulators for Electrochemical Sensor Arrays
      A. Laifi, M.A. Al Abaji, R. Thewes (Tech. Univ. Berlin, Germany)
    • COTS FPGA/SRAM Irradiations Using a Dedicated Testing Infrastucture for Characteristation of Large Component Batches
      S. Uznanski, B. Todd, J. Walter, A. Vilar-Villanueva (CERN, Switzerland)
    • CMRR Improvement for Multichannel Integrated Recording Circuits Processed in Submicron Technologies Dedicated to Neurobiology Experiments
      P. Kmon (AGH Univ. of Science and Techn., Poland)
    • Design and Simulations of the 10-bit SAR ADC in Novel Sub-micron Technology 200 nm SOI CMOS
      R. Dasgupta, S. Bugiel, S. Głąb, M. Idzik, J. Moron (AGH Univ. of Science and Techn., Poland), P. Kapusta (Inst. of Nuclear Physics, Polish Academy of Sciences, Poland)
    • Design of the Reset and Calibration Circuits in a Dual Stage Charge Sensitive Processing Chain Based on Time-over-Threshold Technique for Tracking Applications
      K. Kasiński, R. Kłeczek (AGH Univ. of Science and Techn., Poland)
    • Experiments on Two Clock Countermeasures Against Power Analysis Attacks
      R. Menicocci (Fondazione Ugo Bordoni, Italy), A. Trifiletti, F. Trotta (Sapienza Univ. Rome, Italy)
    • Implementing Radar Algorithms on CUDA Hardware
      P. Monsurrò, A. Trifiletti, F. Lannutti (Sapienza Univ. Rome, Italy)
    • Improving Co-design of Smart Sensor Front-Ends
      R. Świerczyński, K. Urbański, A. Wymysłowski (Wroclaw Univ. of Techn., Poland)
    • Monte-Carlo and Transient-Noise Simulational Analysis of Rolling-Shutter Binary Readout Pixel Circuit
      M. Jankowski (Lodz Univ. of Techn., Poland)
  2. Poland Section IEEE ED Chapter Special Award
    • Design of Broad-band Power Amplifiers by Means of an Impedance Transforming Lossy Equalizer
      F. Centurelli (Sapienza Univ. of Rome, Italy), M. Djukanovic (Univ. Montenegro, Montenegro), G. Scotti, P. Tommasino, A. Trifiletti (Sapienza Univ. of Rome, Italy)
  3. Young Scientist Paper Award
    • Amin Akbari for papers:
      A Novel Mixed-Signal Digital Voltage Mode CMOS Fuzzy Logic Controller in 0.18µm Technology
      M. Ghasemzadeh, A. Akbari, A. Khoei, K. Hadidi (Urmia Univ., Iran)
      A Novel Mixed-Signal Digital CMOS Fuzzy Logic Controller in Current Mode
      M. Ghasemzadeh, A. Akbari, A. Soltani, A. Khoei, K. Hadidi (Urmia Univ., Iran)

Receipt of papers:

March 1st, 2017

Notification of acceptance:

April 30th, 2017

Registration opening:

May 15th, 2017

Final paper versions:

May 31th, 2017